Antonio Carneiro de Mesquita Filho

Instituição:

Universidade Federal do Rio de Janeiro

Centro:

Centro de Tecnologia

Unidade:

Coordenação dos Programas de Pós-Graduação de Engenharia

Departamento:

Programa de Engenharia Elétrica/COPPE

ORCID:

não disponível no Lattes


Formação:

  • Université Toulouse III Paul Sabatier

    Eletronica e Automática | Doutorado | 1975 - 1980

  • Pontifícia Universidade Católica do Rio de Janeiro

    Engenharia Elétrica | Mestrado | 1972 - 1975

  • Pontifícia Universidade Católica de Minas Gerais

    Engenharia Eletrica | Graduação | 1965 - 1970
Laboratórios:
Nenhum laboratório cadastrado
Nuvens de Palavras:
Artigos:

(15.00% artigos com DOI)

Titulo DOI Ano
An Evolutionary Method for Synthesizing Low-Sensitivity Lossless Matching Networks 10.1007/s00034-016-0242-6 2016
Synthesis of Low Sensitivity Broadband Matching Networks Using Clonal Selection Algorithm 2016
Introduction to Evolvable Hardware: A Practical Guide for Designing Self-Adaptive Systems 10.1007/s10710-008-9058-x 2008
Layout techniques for radiation hardening of standard CMOS active pixel sensors 10.1007/s10470-008-9183-8 2008
Improvements in FSM Evolution from Partial Input/Output Sequences 2004
A Scenario Based Approach to Protocol Design Using Evolutionary Techniques 2004
Hydrogen and Hydride Detection in Metallic Glasses 2004
Using Genetic Programming and High Level Synthesis to Design Optimized Datapath 2003
Characterization of hydrogen in metallic glasses by the use of Hall effect measurements 2003
Synthesis Method for Testable Electrical Networks using 1st Order Building Blocks 2002
Fault Models and Test Generation for OpAmp Circuits-The FFM 2001
?Síntese de Alto Nível de Protocolos de Comunicação Especificados na Linguagem Formal Estelle usando o Ambiente AMICAL?. 1997
Diodos PIN de Silício Amorfo Hidrogenado Aplicados à Detecção de Radiação 1996
A Modular Distributed Arithmetic Implementation of the Inner Product with Application to Digital Filters 1995
Diodos PIN de Sílicio Amorfo Hidrogenado Aplicados à Detecção de Radiação Revista Militar de Ciência e Tecnologia, 1995
Configurable Cells: Towards Dynamic Architectures 1993
Analysis of the Dynamic and Steady-State Performance of Cockcroft-WaltonCascade Rectifiers 1992
A Closed Form Solution For Regular Descriptor Systems Using The Moore-Penrose Generalized Inverse 1990
Analyse de Circuits Par L'Iversion Numerique de La Transformiee de Laplace 1979
The Time Domain Solution Of The Volterra Functional Equation 1979
Eventos:

(4.76% eventos com DOI)

Titulo DOI Ano
Evolutionary Synthesis of Low-Sensitivity Equalizers Using Adjacency Matrix Representation 2008
Synthesis of Voltage Follower with Only CMOS Transistors Using Evolutionary Methods 2007
Layout Techniques for Radiation Hardening of Standard CMOS Active Pixel Sensors 2007
Using Swarm Intelligence to Solve Some Analog Test Issues 2006
Fault-trajectory approach for fault diagnosis on analog circuits 10.1109/DATE.2005.154 2005
Detecting Regions of Insensitivity on Parametric Faults in Frequency Domain for Continuous-Time Analog Filters Continuous-Time Analog Filters 2005
Tuning evolvable PID controllers through a clonal selection algorithm 10.1109/EH.2005.47 2005
ATPG for fault diagnosis on analog electrical networks using evolutionary techniques 2004
Radiation-tolerant CMOS APS 2004
On the Use of Genetic Algorithms for Fault Diagnosis on Continuous-Time Analog Filters 2004
Evolutionary Synthesis of Analog Circuits using only MOS Transistors 10.1109/EH.2004.1310807 2004
Evolvable Building Blocks for Analog Fuzzy Logic Controllers 2003
Optimized Datapath Design by Evolutionary Computation 2003
Evolutionary Synthesis of Communication Protocols 2003
Testing Phase-Locked Loops Using Phase Input Transient Analysis 2003
A Rank Based Genetic Algorithm for Fault Tolerant Analog Circuits Synthesis 2003
Síntese de Circuitos Digitais Otimizados Via Programação Genética 2003
An experiment on nonlinear synthesis using evolutionary techniques based only on CMOS transistors 2003
Filters Designed for Testability Wrapped on the Mixed-Signal Test Bus 2002
Designing for Test Butterworth and Chebyshev Low-Pass Filters of Any Order 2002
State Model Approach for Analog Fault Modeling 2002
Chromosome Representation through Adjacency Matrix in Evolutionary Circuits Synthesis 2002
HW/SW Codesign of Handoff Protocol for Wireless ATM Networks based on Performance Optimization using Genetic Algorithm 2002
Design of a Reliable Multicast Protocol Using HW/SW Codesign Based on Performance Optimization with Genetic Algorithms 2002
Characterization of Hydrogen in Metallic Glasses by the Use of Hall Effect Measurements 2002
HW/SW Codesign de Protocolos Baseado na Otimização de Desempenho por Algoritmos Genéticos 2001
Synthesizing Testable Electrical Networks with 1st Order Building Blocks 2001
Filter Sensitivity Analysis Using the TRAM 2001
Designing Testable Networks for Transfer Function Realization 2001
On the Filter Sensitivity Analysis Using the TRAM- The SA-TRAM 2001
Fault Models and Compact Test Vectors for MOS OpAmp Circuits 2000
Fault Models and Compact Test Vectors for MOS OpAmp Circuits 2000
Synthesis of Analog Circuits Using Evolutionary Hardware 2000
Protocolos de Comunicação em Circuitos Integrados: Experiências e Resultados 1999
Communication Protocols in Integrated Circuits: Experiments and Results 1999
Desenvolvimento de Sensores de Hidrogênio para Refinarias de Petróleo 1999
Logic and High Level Synthesis for Communication Protocols 1999
High Level Synthesis of Protocols Described by a Formal Description Technique 1997
Implementação em Hardware de Protocolos para Redes de Alta Velocidade a Partirde uma Descrição Formal 1997
Mapeamento de Estelle em VHDL e Estilos de Descrição de Protocolos deComunicação para Síntese de Alto Nível 1996
Analysis of Different Protocol Description Styles in VHDL to High-Level Synthesis 1996
Diodos p-i-n de Silício Amorfo Hidrogenado Aplicados à Detecção de Radiação 1996
Uma Metodologia para a Implementação de Sistemas Distribuídos em Hardware a Partir de uma Especificação Formal 1995
A Methodology to Develop Integrated Circuits from Estelle Specifications.? 1995
A Metodology to the Implementation of Distributed Systems in Hardware from aFormal Description 1995
Implementation of Hardware Structures Through Configurable Logic 1994
Síntese de Alto Nível de Protocolos de Redes Descritos em Estelle 1994
Specification of a Programmable Logic Array 1993
Proposta de uma Arquitetura Configurável por Software. 1991
A Modular Distributed Arithmetic Implementation Of Inner Product Including Quatization 1990
Steady-state and Dynamic Performance of Cascode Cockcroft-Walton Rectifier 1990
Modelling And Analysis Of The Dynamic Performance Of Cascade Recifiers 1988
Modelagem e Analise de Uma Fonte CC de Alta Tensao Utilizando Retificador Em Cascata 1988
Convergence Properties of Relaxation methods in the DC Analysis of Large MOS Circuits 1988
Solution Of Singular Linear Systems: Geometric Properties And Algorithms 1987
A New Simulation Method For A Self-Controlled Synchrondus Machine Dynamics 1987
Simulacao Eletrica de Circuitos MOS VLSI Baseada na Relaxação por Ondas 1987
Solution Of Singular Linear Systems 1985
Projeto de Circuitos Nao Lineares Atraves de Metodos de Otimizacao Multicriterios 1984
On The Iterative Solution Of Volterra Functional Equations 1983
Estudo Comparativo de Dois Métodos de Otimização de Circuitos Lineares 1982
Resposta Transiente de Circuitos Não-Lineares Contendo Elementos Distribuídos 1982
An Algorithm for the Numerical Solution of Volterra Functional Equations 1979
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